Course Description

Hardware implementation of a microcomputer architecture using modern microprocessors and related integrated circuits: clock subsystem, bus drivers, map decoders, R/W memory, ROM, serial and parallel I/O, DMA, interrupts.

Course Catalog Description

Microcomputer architecture design describing the system bus, memory subsystems and peripherals. Unidirectional and bidirectional system bus; SRAM, SDRAM and FLASH memories and their bus interfaces; DMA, interrupt controller, transmitter/receiver, timers, display adapter, A/D and D/A converters and other system peripherals and their interfaces with system bus.

Planned classes

  1. Introduction to the SJ2 board, and development environment
    • Discuss class expectations
    • Introduction to SRAM and Flash memory
    • Mail out the boards
    • Setup slack for class collaboration
  2. Clock system
    • Discuss the role of a PLL
    • Peripheral clock divider
  3. Memory map
    • Bit masking, LPC provided memory map
    • LED and switch interface
  4. DMA
    • Introduction to the peripheral
    • Lab assignment: Setup memory-to-memory transfers
  5. Midterm
    • Review session, followed by the exam
  6. Timer
    • Setup HW timer that rolls over each second
    • Lab assignment: Build an API to create a precise delay of nanoseconds
  7. DMA to GPIO
    • Lab assignment: Setup timer to trigger for the DMA
    • Transfer a block of memory to the GPIO memory
  8. UART driven by GPIO
    • Lab assignment: Use the timer API to delay by nanoseconds
  9. UART driven by peripheral
    • Lab assignment: Write a "peripheral driver"
  10. Future facing knowledge: FreeRTOS
    • Lab assignment: Create multiple tasks
  11. Last class
    • Final examination
    • Goodbyes
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