Pin Control and Pin Function Selection (LPC40xx) Objective Learn about the selectable features of pins in the LPC40xx MCU, how to enable/disable these features and how to, select a pin's functionality. Pin Features The LPC40xx series chips have pins with the following features see chapter Chapter 6: LPC408x/407x Pin configuration & Chapter 7: LPC408x/407x I/O configuration Figure 1. I/O configurations Signals Highlighted (UM10562 LPC40xx Page 122) Open Drain Enable: Enabling this disables the high side MOSFET in of the totem pole configuration, making that pin an open drain. Pin Modes (Only one or none of these can be active at once) Pull-Up Enable:Enabling this turns on the weak pull-down MOSFET in the ohmic region. Pull-Down Enable: Enabling this turns on the weak pull-down MOSFET in the ohmic region. Repeater Mode Enable: Enabling this, will activate the pull up or pull down resistor from the last. Enable Input Invert: Converts a pin configured as an input to active low. Enable Glitch Filter: Enables the 10nS glitch filter. Enable Analog Input: Disables schmitt trigger and enables voltage to pass through analog switch to analog input. There are actually more controls then this depending on the pin type you are using. Figure 2. Type D IOCON registers (page 132) Figure 3. Type A IOCON registers (page 138) Figure 3. Type U IOCON registers. Only has a function (page 140) Setting Pin Function Every GPIO pin of the LPC40xx is capable of other alternative functionalities. Pin selection is the method by which a user is able to designate the functionality of any given pin. For example, GPIO Pin 0.0 can alternatively by used for CAN channel 1 receive, UART channel 3 transmit, and I2C channel 1 data line. Figure 1B. I/O Pin Select Mux (from LPC2148, for illustration purposes only) // Example of setting pin function using LPC40xx.h pointers // Set as UART 0 Transmit U0_TXD LPC_IOCON->P0_0 = (LPC_IOCON->P0_0 & ~0b111) | 0b100; // Set as SSP0_SCK LPC_IOCON->P0_15 = (LPC_IOCON->P0_15 & ~0b111) | 0b010; For example, if one desires to configure pin 0.09 to enable a pull-up resistor and open drain mode, one must clear bits 18 & 19 of PINMODE0 register, and set bit 9 of register PINMODE_OD0. // Using the memory address from the datasheet *(0x4002C040) &= ~(0x3 << 18); // Clear bits 18 & 19 *(0x4002C068) |= (0x1 << 9); // Set bit 9 // Using LPC17xx.h pointers LPC_PINCON->PINMODE0 &= ~(0x3 << 18); // Clear bits 18 & 19 LPC_PINCON->PINMODE_OD0 |= (0x1 << 9); // Set bit 9