I²C (Inter-Integrated Circuit)

Theory of Operation

I2C is prounced "eye-squared see". It is also known as "TWI" because of the intial patent issues of this BUS. This is a popular, low throughput (100-1000Khz), half-duplix BUS that only uses two wires regardless of how many devices are on this BUS. Many sensors use this BUS because of its ease of adding to a system.

Open-Collector BUS

I2C is an open-collector BUS, which means that no device shall have the capability of internally connecting either SDA or SCL wires to power source. The communication wires are instead connected to the power source through a "pull-up" resistor. When a device wants to communicate, it simply lets go of the wire for it to go back to logical "high" or "1" or it can connect it to ground to indicate logical "0".

Pull-up resistor

Using a smaller pull-up can acheiver higher speeds, but then each device must have the capability of sinking that much more current. For example, with a 5v BUS, and 1K pull-up, each device must be able to sink 5mA.

I2C Circuit Simulation

Protocol Information

I2C was designed to be able to read and write memory on a slave device. The protocol may be complicated, but a typical "transaction" involving read or write of a register on a slave device is simple granted a "sunny-day scenario" in which no errors occur.

The code given below illustrates I2C transaction split into functions, but this is the wrong way of writing an I2C driver. An I2C driver should be "transaction-based" and the entire transfer should be carried out using a state machine. The idea is to design your software to walk the I2C hardware through its state to complete an I2C transfer.

In the diagrams given below, your software should take the step given in the arrow, and the hardware will go to the next state granted that no errors occur. To implement this in your software, you should follow the following steps :

  1. Perform the action given by the arrow
  2. Clear the "SI" (state change) bit for HW to take the next step
  3. Wait for "SI" (state change) bit to set, then take the next action

The master will always initiate the transfer, and the device reading the data should always "ACK" the byte. For example, the master sends the 8-bit address after the START condition and the addressed slave should ACK the 9th bit (pull the line LOW). Likewise, when the master sends the first byte after the address, the slave should ACK that byte if it wishes to continue the transfer.

When the master enters the "read mode" after transmitting the read address after a repeat-start, the master begins to "ACK" each byte that the slave sends. When the master "NACKs", it is an indication to the slave that it doesn't want to read anymore bytes from the slave.


Write Transaction


I2C Write Transaction
Code Sample

A typical I2C write is to be able to write a register or memory address on a slave device. Here are the steps:

  1. Master sends START condition followed by device address.
    Device should then "ACK" using 9th bit.
  2. Master sends device's "memory address" (1 or more bytes).
    Each byte should be ACK'd by slave.
  3. Master sends the data to write (1 or more bytes).
    Each byte should be ACK'd by slave.
  4. Master sends the STOP condition.

To maximize throughput and avoid having to do this for each memory location, the memory address is considered "starting address". If we continue to write data, we will end up writing data to M, M+1, M+2 etc.

The ideal way of writing an I2C driver is one that is able to carry out an entire transaction given by the function below. Note that the function only shows the different actions hardware should take to carry out the transaction, but your software should be state machine based as illustrated on the state machine diagram on the right.


void i2c_write_slave_reg(void)
    /* Optionaly write more data to slave_reg+1, slave_reg+2 etc. */
    // i2c_write(data); /* M + 1 */
    // i2c_write(data); /* M + 2 */



I2C Read Transaction

Read Transaction

Code Sample

An I2C read is slightly more complex and involves more protocol to follow. What we have to do is switch from "write-mode" to "read-mode" by sending a repeat start, but this time with an ODD address. To simplify things, you can consider an I2C even address being "write-mode" and I2C odd address being "read-mode".

Again, the function shows what we want to accomplish. The actual driver should use state machine logic to carry-out the entire transaction.


void i2c_write_slave_reg(void)
    i2c_start();                  // Repeat start
    i2c_write(slave_addr | 0x01); // Odd address
    char data = i2c_read(0);      // NACK if reading last byte

    /* If we wanted to read 3 register, it would look like this:
     * char d1 = i2c_read(1);
     * char d2 = i2c_read(1);
     * char d3 = i2c_read(0);



I2C Slave State Machine Planning

Before you jump right into the assignment, do the following:

  • Read and understand how an I2C master performs slave register read and write operation
    Look at existing code to see how the master operation handles the I2C state machine function
    This is important so you can understand the existing code base
  • Next to each of the master state, determine which slave state is entered when the master enters its state
  • Determine how your slave memory or registers will be read or written

It is important to understand the states, and use the datasheet to figure out what to do in the state to reach the next desired state given in the diagrams below.

Master Write

In the diagram below, note that when the master sends the "R#", which is the register to write, the slave state machine should save this data byte as it's INDEX location. Upon the next data byte, the indexed data byte should be written.

I2C Master Write Transaction
Section 19.9.1 in LPC17xx User Manual

Master Read

In the diagram below, the master will write the index location (the first data byte), and then perform a repeat start. After that, you should start returning your indexed data bytes.

I2C Master Read Transaction
Section 19.9.2 in LPC17xx User Manual


I2C Slave State Machine Assignment

Design your I2C slave state machine. Look at the "Master Write" and "Master Read", and do the following:

  • Right underneath the Master State, determine which state the slave will enter when the master is in each of the states
  • In each slave state, determine the action you will perform for the transaction. (Refer to section 19.9.3 and 19.9.4 in LPC17xx user manual for slave states)
  • You can design your own state machine, or augment the existing one, whichever method can yield the maximum clarify for your I2C slave state.
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